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          LAN8720简介
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        <p>​        参考的博文链接如下：<a target="_blank" rel="noopener" href="https://blog.csdn.net/doyoung1/article/details/124426014">https://blog.csdn.net/doyoung1/article/details/124426014</a></p>
<p><a target="_blank" rel="noopener" href="https://javaforall.cn/151068.html">https://javaforall.cn/151068.html</a></p>
<p><a target="_blank" rel="noopener" href="http://t.zoukankan.com/wllgo-p-10839799.html">http://t.zoukankan.com/wllgo-p-10839799.html</a></p>
<p><a target="_blank" rel="noopener" href="https://blog.csdn.net/u012568663/article/details/120894150">https://blog.csdn.net/u012568663/article/details/120894150</a></p>
<h3 id="1-系统框图"><a href="#1-系统框图" class="headerlink" title="1.系统框图"></a>1.系统框图</h3><p><img src="https://xdl-blog-picture.oss-cn-shanghai.aliyuncs.com/img/ff12b910785d417a860e62a3a124e2a0.png"></p>
<pre><code>     LAN8720是一款PHY芯片，寄存器配置与数据传输的接口是相互独立的，寄存器配置接口为SMI，数据传输接口为RMII，SMI接口为一根时钟线，一根数据线，被称做串行管理接口，RMII接口用来传输数据，相比MII接口，更加精简，被称做精简MII接口，其中字母R即reduced。</code></pre>
<h3 id="2-参考电路"><a href="#2-参考电路" class="headerlink" title="2.参考电路"></a>2.参考电路</h3><p>正点原子的电路：</p>
<img src="https://xdl-blog-picture.oss-cn-shanghai.aliyuncs.com/img/微信截图_20220812210517.png" style="zoom:80%;">

<p>微雪的电路：</p>
<p><img src="https://xdl-blog-picture.oss-cn-shanghai.aliyuncs.com/img/b6c0128c-e9a2-4a9a-9e20-611d38da5dff2022061919cad5fd-2151-48b9-85d9-f12167ba86d31.jpg"></p>
<p>从原理图中可以看出正点原子的LAN8720A模块所使用的晶振是25M,而微雪的LAN8720A模块使用的晶振是50M,</p>
<p>微雪的LAN8720A的nINTSEL没有接下拉，则是默认使用内部上拉到高电平，即nINTSEL=1，为REF_CLK In Mode模式，所以选用50M的晶振。正点原子的nINTSEL下拉到了GND，为REF_CLK Out Mode模式，所以用25M晶振倍频到50M，可以节省成本。</p>
<h3 id="3-重要引脚"><a href="#3-重要引脚" class="headerlink" title="3.重要引脚"></a>3.重要引脚</h3><h4 id="3-1-RXER-PHYAD0引脚"><a href="#3-1-RXER-PHYAD0引脚" class="headerlink" title="3.1 RXER/PHYAD0引脚"></a>3.1 RXER/PHYAD0引脚</h4><p>​        MAC可以通过SMI接口来读写PHY(LAN8720)的寄存器，SMI最多可以控制32个PHY芯片，通过不同的PHY芯片地址来对不同的PHY操作。LAN8720通过设置RXER/PHYAD0引脚来设置其PHY地址，默认情况下为0，其地址设置如下图所示：</p>
<img src="https://xdl-blog-picture.oss-cn-shanghai.aliyuncs.com/img/1639357-20190509170110539-1496476022.png" style="zoom:57%;">

<h4 id="3-2-nINT-REFCLKO引脚"><a href="#3-2-nINT-REFCLKO引脚" class="headerlink" title="3.2 nINT/REFCLKO引脚"></a>3.2 nINT/REFCLKO引脚</h4><p>​        nINTSEL引脚(2号引脚)用于设置nINT/REFCLKO引脚(14号引脚)的功能。nINTSEL配置如下图所示。</p>
<img src="https://xdl-blog-picture.oss-cn-shanghai.aliyuncs.com/img/1639357-20190509170408708-1747239924.png" style="zoom:67%;">

<p><strong>REF_CLK In模式</strong></p>
<p>​        当工作在REF_CLK In模式时，50MHz的外部时钟信号应接到LAN8720的XTAL1/CKIN引脚(5号引脚)和STM32F407的RMII_REF_CLK(PA1)引脚上，如下图所示。</p>
<p><img src="https://xdl-blog-picture.oss-cn-shanghai.aliyuncs.com/img/1639357-20190509170903823-415684001.png"></p>
<p><strong>REF_CLK Out模式</strong></p>
<p>​        为了降低成本，LAN8720可以从外部的25MHz的晶振中产生REF_CLK时钟。到要使用此功能时应工作在REF_CLK Out模式时。当工作在REF_CLO Out模式时REF_CLK的时钟源如下图所示。</p>
<p><img src="https://xdl-blog-picture.oss-cn-shanghai.aliyuncs.com/img/1639357-20190509171426430-1676245566.png"></p>
<h4 id="3-3-MODE-2-0-引脚"><a href="#3-3-MODE-2-0-引脚" class="headerlink" title="3.3  MODE[2:0]引脚"></a>3.3  MODE[2:0]引脚</h4><p>​        用于选择 LAN8720A 网络通信速率和工作模式，可选 10Mbps 或 100Mbps 通信速度，半双工或全双工工作模式。另外 LAN8720A 支持 HP Auto-MDIX 自动翻转功能，即可自动识别直连或交叉网线并自适应。一般将 MODE 引脚都设置为 1，可以让 LAN8720A 启动自适应功能，它会自动寻找最优工作方式。MODE[0]与 RXD0 引脚共用、MODE[1]与 RXD1 引脚共用、MODE[2]与 CRS_DV 引脚共用。</p>
<p>​        通过MODE[2:0] 硬件配置引脚，可以支持以下几种模式： </p>
<img src="https://xdl-blog-picture.oss-cn-shanghai.aliyuncs.com/img/54560d98453b4d6eb25d80dd62666c0c.jpg" style="zoom:80%;">

<h4 id="3-4-REGOFF引脚"><a href="#3-4-REGOFF引脚" class="headerlink" title="3.4 REGOFF引脚"></a>3.4 REGOFF引脚</h4><p>​        REGOFF引脚用于配置内部+1.2V电压源，LAN8720A 内部需要+1.2V电压，可以通过VDDCR引脚输入+1.2V 电压提供，也可以直接利用 LAN8720A 内部+1.2V 稳压器提供。当REGOFF引脚为低电平时选择内部+1.2V稳压器。REGOFF与 LED1 引脚共用。</p>
<h3 id="4-STM32F4和LAN8720的连接"><a href="#4-STM32F4和LAN8720的连接" class="headerlink" title="4.STM32F4和LAN8720的连接"></a>4.STM32F4和LAN8720的连接</h3><img src="https://xdl-blog-picture.oss-cn-shanghai.aliyuncs.com/img/微信截图_20220814194117.png" style="zoom:80%;">

<h4 id="4-1-SMI-接口"><a href="#4-1-SMI-接口" class="headerlink" title="4.1 SMI 接口"></a>4.1 SMI 接口</h4><p>​        即站管理接口，该接口允许应用程序通过 2 条线：时钟(MDC)和数据线(MDIO)。访问任意 PHY 寄存器。该接口支持访问多达 32 个 PHY，应用程序可以从 32 个 PHY 中选择一个 PHY，然后从任意 PHY 包含的 32 个寄存器中选择一个寄存器，发送控制数据或接收状态信息。任意给定时间内只能对一个 PHY 中的一个寄存器进行寻址。</p>
<h4 id="4-2-RMII-接口"><a href="#4-2-RMII-接口" class="headerlink" title="4.2 RMII 接口"></a>4.2 RMII 接口</h4><p>​        即精简介质独立接口，该接口降低了在 10/100 Mbit/s 下微控制器以太网外设与外部 PHY 间的引脚数。根据 IEEE 802.3u 标准，MII 包括 16 个数据和控制信号的引脚。RMII 规范将引脚数减少为 7 个。</p>
<img src="https://xdl-blog-picture.oss-cn-shanghai.aliyuncs.com/img/微信截图_20220814195332.png" style="zoom:50%;">

<p>​        因为 RMII 相比 MII，其发送和接收都少了两条线。因此要达到 10Mbit/s 的速度，其时钟频率应为 5MHZ，同理要达到100Mbit/s 的速度其时钟频率应为 50MHz，而 MII 接口分别为 2.5MHZ 和 25MHZ。</p>
<h3 id="5-OSI模型"><a href="#5-OSI模型" class="headerlink" title="5. OSI模型"></a>5. OSI模型</h3><img src="https://xdl-blog-picture.oss-cn-shanghai.aliyuncs.com/img/微信截图_20220814195854.png" style="zoom:67%;">

<p>​        在一般的 LWIP 实验中 PHY 层芯片 LAN8720 相当于物理层，STM32F407 自带的 MAC 层相当于数据链路层,而 LWIP 提供的就是网络层、传输层的功能，应用层是需要用户自己根据自己想要的功能去实现。</p>

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